基础设施硬件信号完整性工程师

Support the development of next-generation SI/PI solutions across a broad range of Meta platforms, including AI, network, and compute systems

Perform signal integrity simulations, implementation, validation, and test methodologies at the board and system levels using industry-standard tools such as HSpice, ADS, or Sigrity to validate channel performance and margins

Develop and maintain channel models, IBIS-AMI models, and S-parameter extraction workflows for board-level and system-level SI analysis including end-to-end electrical-optical-electrical channels

Collaborate with design and manufacturing teams to define stack-up requirements, routing constraints, via structures, and impedance targets for multi-layer high-speed designs

Drive lab correlation and validation activities, including TDR, VNA, and oscilloscope-based measurements, to verify simulation accuracy and characterize channel performance

Partner with silicon vendors and internal ASIC teams to evaluate PHY specifications, equalization parameters, and link training behavior for new interface standards

Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or a relevant technical field, or equivalent practical experience

2+ years of experience in signal integrity engineering for high-speed digital systems, including board-level and system-level SI/PI analysis

Experience collaborating on SerDes bring-up, equalization tuning, and compliance testing for next-generation interface standards

Experience with advanced PCB materials, HDI materials, and evolving interconnect technologies

Familiarity with IBIS-AMI modeling, channel simulation automation scripting, and statistical eye analysis methodologies

Experience with lab correlation and validation activities, including TDR, VNA, and oscilloscope-based measurements, to verify simulation accuracy and characterize channel performance

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Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or a relevant technical field, or equivalent practical experience.

2+ years of experience in signal integrity engineering for high-speed digital systems, including board-level and system-level SI/PI analysis.