硅封装工程师

Perform package design for AI/ML and networking applications custom Si with single-chip/multi-chip and SiP/module packaging, design feasibility studies and analyses to ensure good manufacturing at ODM

Lead development of next-generation advanced packaging technologies from concept to product, including test vehicle definition and building with ecosystem partners

Work with internal Si, architecture and system teams, and externally with engaged partners, ODM, design houses and OSAT companies

Perform design analysis and what-if scenarios for novel packaging schemes such as 2.5D/3D and heterogeneous integration to improve package form factor for next-generation versions of current products

ASIC roadmaps for the development of advanced packaging technologies (SMT, solder ball attach, and other assembly process)

Participate early in Si/package/PCB/system co-design and ODM SMT manufacturing work in product development design reviews, providing feedback on manufacturability and helping incorporate the latest technology advancements and design rules

Create, conduct and analyze Design of Experiments (DOE) for development and sustaining activities

Work cross-functionally with design, NPI, quality and reliability, and manufacturing teams, and support new technology integration into products

Collaborate with internal and external stakeholders to ensure seamless integration of packaging technology into product development cycles

Stay abreast of the latest advancements in advanced packaging technologies and market trends

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

Master's degree in Materials Science, Mechanical Engineering, Electrical Engineering, or a related field, or equivalent practical experience

8+ years of experience in semiconductor packaging with direct ownership of advanced packaging development and assembly process and manufacturing

Experience taking products from concept to production, including development of manufacturing specifications, vendor qualifications, and improvement of manufacturing efficiencies and costs

Experience communicating technical packaging decisions in writing and in reviews to cross-functional engineering and manufacturing stakeholders

Hands-on experience in interposer or fanout package design for both organic and inorganic interposer with or without bridges such as CoWoS-L, CoWoS-R, EMIB, embedded fanout bridge from OSAT

Proven technical understanding of the full range of semiconductor packaging design, SMT processes, PCB design and layout tools, failure mechanisms and analytical techniques

In-depth knowledge of 2.5D and 3D packaging technologies, including silicon interposers, TSVs, and microbumps and advanced packages interaction with board-assembly constraints

Master's degree or PhD in Materials Science, Mechanical Engineering, or a related discipline

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Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

Master's degree in Materials Science, Mechanical Engineering, Electrical Engineering, or a related field, or equivalent practical experience.